Kartheek D is an experienced Silicon Design Verification Engineer currently employed at Google since July 2024. Prior to this role, Kartheek held positions at Cadence Design Systems from March 2021 to July 2023, serving as both a Senior Design Verification Engineer and Lead Design Verification Engineer. Prior experience includes working at Tata Elxsi from July 2018 to March 2021 as a Design Verification Engineer and Senior Verification Engineer. Kartheek D holds a degree in Telecommunication Engineering from PESIT, completed in 2018.
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