Manu M T

Manu M T is a seasoned verification engineer with extensive experience in the field of design and system-on-chip (SoC) verification. From January 2020 to January 2023, Manu served as a Senior Verification Engineer at FrenusTech Pvt Ltd, after working in various capacities including Consultant Design Verification Engineer at Saankhya Labs Pvt Ltd and Qualcomm. Previous roles include VLSI design and verification course at Maven Silicon, SOC Verification Consultant at NVIDIA, and Verification Engineer at Frenus Tech Pvt Ltd. Currently, Manu holds the position of Staff Engineer at MaxLinear, focusing on IP verification and SoC verification, and recently transitioned to Google as a SOC Verification Engineer Consultant, specializing in GPU SOC level sanity bring-up and vector generation. Academic credentials include a Bachelor of Engineering in Electrical and Electronics Engineering from Acharya Institute Of Technology (2013 - 2017).