Michael Reese

Michael Reese is an experienced engineer specializing in design for test (DFT) with a robust career spanning several notable companies in the semiconductor industry. At TSMC, Michael served as a DFT Architect from August 2018 to May 2022. Prior to that, a significant tenure at AMD included roles as a DFT Engineer and a Process Engineer, where leadership of a team for ATPG feature verification was notable. Michael's earlier experience at Freescale involved pioneering the company’s first full-BIST chip implementation. As a DFT Architect at Conexant Systems, efforts were directed towards multiple chip development projects. Since March 2022, Michael has been contributing as a DFT Engineer at Google. Educational qualifications include a Master’s degree in Semiconductor Design from National Technological University and a Bachelor’s degree in Chemical Engineering from The University of Texas at Austin.