Nicole (Xueqiong) Yao is a dedicated Senior Design Verification Engineer at Google, specializing in edge TPU machine learning design verification. With a solid background in VLSI and computer architecture, Nicole has extensive hands-on experience in ASIC design verification and chip validation gained through roles at Intel Corporation and ScaleFlux. Prior to that, Nicole worked on PCIe switching products at PLX, an Avago Technologies Company, where they contributed to chip-level performance testing and post-silicon validation. Nicole earned a Bachelor of Engineering in Electronics and Telecommunications from Zhejiang University and a Master of Science in Electrical and Electronics Engineering from the University of Southern California.
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