Palak Agarwal

RTL Design Engineer

Palak Agarwal is a skilled engineer with extensive experience in the technology sector. Starting as a Teaching Assistant at the National Institute of Technology Warangal from August 2019 to June 2020, Palak then served as a Co-Op Engineer at AMD from August 2020 to June 2021. Following this role, Palak worked at Qualcomm from July 2021, progressing to a Senior Engineer position by December 2023. Palak gained practical experience through a remote internship with Tata Consultancy Services in June 2018, contributing to a data science project focused on loan prediction. Currently, Palak occupies the role of RTL Design Engineer at Google since June 2025. Palak holds a Bachelor of Technology degree in Electronics and Communications Engineering from the Institute of Engineering & Technology with an achievement of 83% and a Master of Technology in VLSI system design from the National Institute of Technology Warangal, achieving a score of 8.56 out of 10.

Location

Bangalore Urban, India

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