Poorva Kelkar is a seasoned Sr CPU Design Verification Engineer currently working at Google since August 2022, with prior experience at Apple as a Design Verification Engineer from February 2019 to August 2022, and at Intel Corporation as a Design Verification Engineer from December 2015 to February 2019. Early career includes roles at Altera and Intel Corporation focusing on FPGA configuration and design verification, along with a graduate technical internship that involved pre-silicon software development and validation. Academic credentials include a Master’s degree in Electrical and Electronics Engineering from the University of Southern California and a Bachelor of Engineering in Electronics and Telecommunication from Vidyalankar Institute of Technology. Skills encompass digital circuit design flows, logic design, RTL design, and experience in Xilinx FPGA flow, along with hands-on experience in various technical projects and library management.
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