Praphulla Pandey possesses a diverse range of engineering experience, particularly in electronics and communications. The professional journey includes roles such as Senior EMIR Engineer at Micron Technology, focusing on EMIR sign off and grid weakness issues, and Senior Application Engineer at Ansys. Previous internships at Telecom Regulatory Authority of India, Keysight Technologies, and IBM India involved significant contributions to projects related to network deployment and electronic component analysis. Currently, Praphulla serves as a Silicon Physical Design Engineer at Google, building on a strong foundation established with a B.Tech. in Electronics and Communications Engineering from the National Institute of Technology, Uttarakhand, where a 9.64 GPA was attained.
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