Robert Toepfer

Robert Toepfer is an accomplished ASIC Architect with a Bachelor of Science in Computer Engineering from Purdue University. They began their career at Intel, where they served as a Rotation Engineer and later, a SoC Architect, as well as a Validation Intern. From 2018 to 2024, Robert worked as a Server SoC Architect at Ampere. Currently, they are a Machine Learning HW Architect at Google, contributing to advancements in hardware design for machine learning applications.