Roi Haskel has extensive experience in verification engineering and hardware design, beginning a career at ELTA from 2012 to 2014, focusing on FPGA logic design for high-speed DSP blocks, Flash memory controllers, and UART interfaces. Roi Haskel then joined Intel Corporation from December 2021 to June 2022, serving as Verification Tech Lead and Virtual Team Leader within the Memory cluster, where responsibilities included developing new verification tools, project execution, and managing milestone tracking and bug analysis. Currently, Roi Haskel is a Verification Engineer at Google, starting in June 2022, and holds a BSc in Electrical and Electronics Engineering from Ben-Gurion University of the Negev, obtained in 2013.
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