Rushabh Shah is a Physical Design Engineer currently at Google since May 2022, with prior experience as a Physical Design Intern at Intel Corporation from June 2015 to May 2016. At Intel, Rushabh gained knowledge in Conformal LEC and ECO tools, achieving signoff quality across multiple partitions and implementing complex ECOs. In the current role at Google, Rushabh has undertaken responsibilities for RTL to GDS implementation and leading innovation for performance, power, and area (PPA) improvements. Rushabh holds a Master's Degree in VLSI Design from the National Institute of Technology Karnataka and a Bachelor's Degree in Electronics and Communication from Gujarat Technological University.
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