Shivangi Gupta is an experienced engineer specializing in Physical Design and ASIC Static Timing Analysis. With a strong background at Intel Corporation, where roles included Physical Design Engineer and Senior Physical Design Engineer from November 2019 to May 2022, and prior experience at NXP Semiconductors as a Senior Design Engineer and Physical Design Engineer, Shivangi has contributed to multiple SOCs focusing on backend physical design processes. Currently, Shivangi serves as an ASIC Static Timing Analysis Engineer at Google since July 2023. Academic qualifications include a Higher Secondary degree in Mathematics and Science with a score of 93.4% from Hellens School and a Bachelor of Technology in Electrical, Electronics and Communications Engineering with a CGPA of 9.68 from Motilal Nehru National Institute of Technology.
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