Soumya Achanta

Soumya Achanta is a Senior Physical Design Engineer with over 8 years of experience specializing in netlist2gds flow across various process technologies including 32nm, 22nm, 14nm, and 10nm. Previously, Soumya worked at Intel Corporation as a Physical Design Engineer and later as a Senior SOC Physical Design Engineer. Currently employed at Google, Soumya is engaged in comprehensive physical design tasks, including Floorplanning, Synthesis, and Timing Closure, utilizing tools such as Synopsys and Cadence. Soumya is pursuing education at multiple institutions, including Timpany, Arizona State University, and Andhra University.