Sriganesh Balakumar

Sriganesh Balakumar is an experienced engineer specializing in digital design and ASIC development. With a background that includes roles at Marvell Semiconductor as a Digital Design Engineer II focusing on high-performance DDR memory controllers, Sriganesh progressed to Qualcomm as a Senior ASIC Design Engineer, contributing to the microarchitecture and RTL design of Video Codec Engine and Computer Vision Hardware Accelerators. Prior experience includes an embedded systems internship at Simple Labs, a teaching assistant role at the University of Illinois at Chicago, and current responsibilities at Google as a Senior ASIC Design Engineer for Machine Learning Accelerators. Sriganesh holds a Master of Science in Electrical and Computer Engineering from the University of Illinois at Chicago and a Bachelor of Engineering from the College of Engineering, Guindy.