Terence Cheung is an IC Package Design Lead at Google with over 15 years of experience in IC Package Engineering. They have a strong track record in package tapeout as both an individual contributor and manager, showcasing versatility in package architecture, design verification, and EDA methodology development. Previously, Terence served as a Principal Engineer at Qualcomm, where they managed package design for mobile and IoT portfolios, and as a Member of Technical Staff Engineer at AMD, contributing to the GPU and APU design efforts. Terence holds a Bachelor of Engineering and a Master of Engineering in Electrical Engineering from McGill University.
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