Vitrag Sheth

Vitrag Sheth is an experienced ASIC Static Timing Analysis Engineer at Google, currently engaged in their role since 2022. With a total of 8 years in Backend VLSI, Vitrag previously held positions at major companies including Intel Corporation and Qualcomm, where Vitrag worked as a Senior STA Engineer and Design Automation Engineer, respectively. Vitrag earned a B.Tech in Electronics and Communication from the Institute of Technology, Nirma University, and a Master’s degree in Microelectronics from the Birla Institute of Technology and Science. Throughout their career, Vitrag has also contributed to academic settings as a Teaching Assistant at BITS Pilani.