Yehuda Pasternak

Yehuda Pasternak is an experienced engineer with a robust background in FPGA logic design and ASIC development. Yehuda began a career at the Israel Defense Forces as a Developer and later advanced to Development Team Lead, overseeing engineering teams and managing design processes. Subsequent roles included Project Manager at MOD, where expertise in pulsed power RF and signal processing was applied, and positions at Qualcomm as a Staff ASIC Design Engineer and at Meta as a Digital Design Engineer. Currently, Yehuda serves as a SoC and IP Design Engineer at Google. Educational credentials include a Master of Business Administration (MBA) in finance from Tel Aviv University and a Bachelor of Science (B.Sc.) in Electrical and Electronics Engineering from Technion - Israel Institute of Technology.