Yulei Zhang is an ASIC Power Architect at Google, specializing in low-power design for Tensor SOCs. With over a decade of experience in VLSI and ASIC design, Yulei has previously held roles at companies such as Broadcom, Apple, Qualcomm, and Meta, focusing on low-power methodologies and design implementations. Yulei began their academic journey as a Research/Teaching Assistant at UC San Diego, where they worked on energy-efficient design projects. They are currently pursuing a Ph.D. in Electrical and Computer Engineering at the University of California San Diego while also holding a Bachelor's Degree in Electronic Engineering from Tsinghua University.
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