Yuxiang Chen

ASIC Design Verification Engineer

Yuxiang Chen is an experienced ASIC Design Verification Engineer with a strong background in developing and verifying advanced technologies for datacenters and storage solutions. Currently employed at Google since March 2020, Yuxiang serves as the team infrastructure lead and design verification owner for the Datacenter Smart NIC project. Prior to Google, Yuxiang contributed to the NVMe Flash Controller at Micron Technology from February 2017 to January 2018 and played a pivotal role as the second design verification engineer at PetaIO, which involved infrastructure development and compliance for the company's inaugural NVMe SSD product from January 2018 to March 2020. Yuxiang holds a Bachelor of Science in Electrical Engineering with a minor in Mathematics from the University of Washington, and a Master’s Degree from Columbia University, complemented by a high school diploma from Carlisle School.

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Sunnyvale, United States

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