Jerry Yang is a Senior DFT Engineer at Graphcore since November 2021, with extensive experience in DFT design, including MBIST, scan insertion, ATPG, test pattern generation, and yield improvement. Prior roles include Principal IC DFT Architect at DisplayLink, Senior R&D Engineer at Nordic Semiconductor ASA, Senior DFT Engineer at NVIDIA Taiwan, and Senior Engineer at GUC. Jerry Yang has also contributed to the development of in-house EDA tools to enhance various design flows. Academic credentials include education from National Tsing Hua University.
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