Joe Tapply

IC Design Engineer And Team Leader at Graphcore

Joe Tapply is an accomplished IC Design Engineer and Team Leader at Graphcore since January 2022, with extensive experience in integrated circuit design and leadership. Prior to joining Graphcore, Joe held significant roles at Synaptics Incorporated and DisplayLink, serving as Principal IC Design Engineer and Subsystem Owner for multiple subsystems, including Pixel Processing and memory. Joe's career includes key positions at Arm, focusing on Mali GPU development, and at ARC International, leading architectural specifications and design for processor components. Joe's engineering journey began at Imagination Technologies as a Graduate Engineer, evolving to a Leading ASIC Design Engineer. Joe graduated with a Bachelor of Engineering (Honors) in Computer Science and Electronics from The University of Edinburgh.

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