Max Engelen is a Staff FPGA Design Engineer at Groq since January 2025. Prior to this role, Max served as a Research Analyst at Erasmus MC from April 2020 to August 2025 and worked as a Multiscale Dataflow Computing Engineer at Maxeler Technologies from January 2022 to January 2025. Max gained initial experience through an internship at Technolution in the fall of 2019, focusing on hardware development for a network data diode as part of a Master's program in Computer Engineering at Delft University of Technology. Max completed a Master's degree in Computer Engineering at Delft University of Technology in 2021, following a Minor in Project Management at the same institution from 2015 to 2018.
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