Ryan Yu is a seasoned NPU Architect with over 15 years of experience in ASIC and digital logic design. They previously served as a Senior ASIC Design Engineer at ViXS Systems Inc. from 2009 to 2017 and as an ASIC Design Engineer at Hong Kong Applied Science and Technology Research Institute Company Limited from 2005 to 2009. Ryan earned a Master of Philosophy and a Bachelor of Engineering, both in Computer Engineering, from the City University of Hong Kong.
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