Weiwei Wang is a Senior Engineer at Hisilicon, specializing in wireless PLL design with a focus on various multimode mobile transceiver chips, including 2G-5G and NB-IoT technologies. Previously, they worked as an Analog Design Engineer at Marvell Semiconductor, where they designed PLL and high-speed link circuits from 2012 to 2015. Weiwei holds a Master's and a Bachelor's degree in Microelectronics from Fudan University, where they studied from 2005 to 2012.
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