Feng Y.

Feng Y. is an engineer currently working at Huawei as an AI processor architect, focusing on advanced technology development. Previously, they contributed significantly to AMD as a PMTS engineer specializing in Graphics Core PPA optimization, along with various roles in ASIC design and power management. They also gained valuable experience at Intel as a SoC low power architect. Feng Y. earned a degree in Electrical and Electronics Engineering from Xi'an Jiaotong University and a Master's in Micro Electronics from Shanghai Jiao Tong University. They are known for their expertise in design verification and power gating methodologies.