JY

JIA YU

Staff RFIC designer

Jia Yu is currently a Staff RFIC designer at Huawei Technologies Co., Ltd., specializing in RF circuit design and testing. Jia possesses extensive design experience in 65nm CMOS RF circuits and is skilled in group coordination and communication. Previously, Jia served as a Project Officer at Nanyang Technological University, where they developed a RF power amplifier for LTE applications and managed the IC tape-out process. Additionally, Jia worked as a Senior Engineer at MediaTek and was a Research Assistant at Temasek Laboratories at NTU, contributing to PCB designs and RF amplifier schematics. Jia holds both a Bachelor and a Master of Engineering in Electrical and Electronic Engineering from Nanyang Technological University.

Location

Singapore

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