JS Jheng is a Physical Design Engineer at Huawei Technologies, specializing in APR/P&R for projects including IP and SOC processes. With previous experience as a Senior Standard Cell Library Engineer at TSMC and a Junior Digital IC Design Integrator at MediaTek, JS has received multiple awards, including the Dedication Award and the MTK vAward. JS holds two Master's degrees in Electronics Engineering from National Taiwan University and National Taipei University of Technology, and a Bachelor's degree in Computer Science and Information Engineering from Cheng Shiu University.
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