丁 宁 is a Senior Digital Logic Engineer at Huawei, focusing on CPU design based on ARM ISA. Prior to this, they were an ASIC Design Manager at SigmaStar Technology, where they led a team in the design of image processing and CPU ASICs. 丁 宁 also held roles as a Senior Algorithm Engineer at ZTE and a Senior Lead Engineer at ASTRI, contributing to significant projects in telecommunications and semiconductor design. They earned an MSc in Electronic Engineering from The University of Sheffield and a BEng in Electronic Information Engineering from Shenzhen University.
Location
Kowloon, Hong Kong
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