Xiaofeng Wu

Director Wireless Terminal Chipsets Technology

Xiaofeng Wu has extensive experience in the telecommunications industry, with a career spanning over three decades. Beginning as a Researcher at Institut für Telekommunikation, Xiaofeng Wu progressed to a Senior Concept Engineer at Siemens before serving as a Principal Wireless System Engineer at Infineon Technologies. From January 2011 to November 2019, Xiaofeng Wu held the position of Principal System Engineer, Manager of 4G/5G System Engineering at Intel Corporation. Since December 2019, Xiaofeng Wu has been the Director of Wireless Terminal Chipsets Technology at 华为. Academic credentials include a PhD in Communication from the University of Dortmund, obtained between 1988 and 1993.

Location

Munich, Germany

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