Xuanqi Chen is currently a Senior DSE Researcher at Huawei Hong Kong Research Center, where they lead the development of PnP models and work as a chip designer in CPU floating-point unit design. Xuanqi completed their PhD at The Hong Kong University of Science and Technology while also serving as a research assistant in computer architecture, contributing to projects on optical interconnect simulation and cache modeling. They previously worked as a Research Associate at Luceda Photonics, focusing on modeling and validation in photonics, and earned a Bachelor of Engineering with honors from the University of Electronic Science and Technology of China. Xuanqi has received the IEEE Technical Committee on VLSI Best Paper Award and is an active reviewer for prestigious CAD/EDA journals and conferences. Additionally, they enjoy running 100km trail races.
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