Gary Maier is an experienced Test Development Engineer at IBM Semiconductor Research and Development Center, specializing in product test development, technology, and product qualifications. Since January 2008, Gary has focused on projects involving yield learning, probe development, and test programming, contributing to the development of industry-first fine pitch area array probes for 3D eDRAM wafers. In addition to current responsibilities, Gary has held roles as a Senior Test Engineer at IBM since 2009, overseeing project management and test development within various fields, including eDRAM and fine pitch probe design. Earlier experience at IBM from 1993 to 2001 included positions as a Product Development/Design Engineer and a Test Equipment Design Engineer, where Gary implemented innovative testing solutions and yield management strategies. Gary holds a Bachelor of Science in Electrical and Electronics Engineering from Manhattan College and an Associate of Science in Electromechanical Engineering from Dutchess Community College.
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