Rajesh v

Rajesh V is currently a Senior R&D Engineer at IBM, specializing in physical design engineering with extensive knowledge in VLSI back end flow. They have previously contributed to the design and testing of VLSI tools and standard/IO cell libraries, working with technologies down to 45nm. Rajesh has also held positions at Texas Instruments, Tata Elxsi, and ARM, where they honed their skills in standard cell layout and physical design. They earned a Bachelor of Engineering in VLSI from Visvesvaraya Technological University in 2005.