Robert Sonnelitter is a Senior Technical Staff Member (STSM) specializing in System Z Nest Microarchitecture at IBM since 2022. Previously, they held various engineering roles at IBM from 2001 to 2014, contributing significantly to the design and implementation of I/O units and cache protocols for several IBM System z products. Robert developed simulation testing environments, led teams, and served as a technical mentor throughout their career. They hold a Bachelor of Science in Electrical and Computer Engineering from Carnegie Mellon University and a Master of Science in Computer Engineering from Walden University.
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