Paul Graves

Paul Graves is a seasoned engineering professional with extensive experience in the semiconductor industry. Currently serving as a Layout Design Engineer at IC Enable since April 2013, Paul specializes in deep sub-micron and multi-pattern design. Prior roles include Lead Design Engineer and Layout Designer at Intersil, where responsibilities encompassed analog IC design, physical design of various interfaces, and supervision of tape-out processes. Earlier positions at Harris Corporation involved component engineering and product engineering for military and aerospace applications, while initial roles at RCA Solid State and GE provided foundational expertise in product and process engineering. Paul holds a Bachelor of Science in Electrical Engineering (BSEE) from the University of Wisconsin-Madison.