Phil Rutter

Phil Rutter is currently the Vice President of Development Engineering at iDEAL Semiconductor. Prior to this, they were the PowerMOS Technology Architect at Nexperia from 1996 to 2020. During this time, they were responsible for creating innovative concepts for next generation Power Trench MOSFET technologies and implementing these concepts into internal and external manufacturing facilities. Phil also managed a small team of technical experts and provided Device & Process simulation support to other parts of the business. Additionally, they were responsible for product development of MOSFET & Driver IC modules (DrMOS) for VRM & POL applications. Before joining Nexperia, Rutter was the Development Manager - Advanced Devices Group (PowerMOS Technology Architect) and Development Manager at NXP Semiconductors from 1996 to 1996.

Phil Rutter completed their education with a PhD from The University of Manchester in 1995, which focused on Erbium Doped GaAs. Prior to that, they obtained an MSc from The University of Manchester in 1993, where they studied Microelectronic Materials & Device Technology. Phil also completed an MEng in Electronics from the University of Southampton in 1992. Phil also attended Wigan Tech.