Amit Kulkarni

Amit Kulkarni, PhD, SMIEEE, is a seasoned professional with extensive experience in ASIC and FPGA design, verification, and embedded systems. Currently serving as an IEEE Senior Member since October 2020, Amit has worked at u-blox as a Senior Design Verification Engineer focusing on ASIC verification and functional coverage. Prior roles include Senior FPGA Engineer and Embedded Software Engineer at duagon AG, where Amit contributed to RTL code generation and FPGA verification, and a Postdoctoral Researcher at ETH Zurich, specializing in FPGA acceleration for data sketch algorithms. Amit's academic foundation includes a PhD in Electrical Engineering from Ghent University, complemented by master's studies in Integrated Electronics System Design from Chalmers University of Technology and a bachelor's degree in Electronics and Communication from Visvesvaraya Technological University.