Deevena is a skilled Physical Verification Engineer with extensive experience in high-level projects for clients such as INTEL and TSMC. They have worked on signoff LV clean-up for multiple blocks and gained strong expertise in Intel 7nm and TSMC N6/N3 LV flows. Currently, Deevena serves as a Senior Engineer at Ignitarium, following roles as a Sr. Physical Verification Engineer at Tech Mahindra and experience at Capgemini Engineering. Deevena holds a Bachelor of Technology in Electronics and Communications Engineering and a postgraduate diploma in Physical Design.
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