Hiroaki Arimura is a Principal Member of Technical Staff at imec, where they currently lead research on metal high-k gate stacks for Logic Nanosheet, CFET devices, and memory peripheral devices. They have a diverse background in semiconductor technology, having worked as a researcher at imec from 2013 to 2019 and as a postdoctoral researcher in 2011. Hiroaki earned a Bachelor's degree in Engineering, a Master's degree in Applied Physics, and a Ph.D. in Engineering Physics/Applied Physics from Osaka University. During their early career, they also completed an internship at IBM T.J. Watson Research Center, focusing on interface dipole studies.
Location
Heverlee, Belgium