Nirav Joshi

Nirav Joshi is a Principal Engineer with over 15 years of experience in ASIC verification, specializing in IP/Sub-system and SoC verification. They have hands-on expertise in System Verilog, UVM, OVM, and VMM methodologies, and have developed multiple verification environments from scratch while enhancing existing ones. Nirav has worked extensively with various protocols including M-PHY, IOSF, SDIO, SPI, AXI, AHB, and APB, and has experience in low power verification and leading teams for IP level verification. Previously, Nirav held positions at NXP Semiconductors, Smart Play Technologies, eInfochips, and Intel India Technology Pvt Ltd, and graduated with a B.E. in Electronics and Communication from Gujarat University.