Ryan Geries

Analog Mixed Signal Design Verification, Lead Principle Mixed Signal Engineer

Ryan Geries is a Mixed Signal Design Verification Engineer at Infineon Technologies and has held various engineering roles throughout their career. They served as an Electrical Engineer Co-op at Kimberly-Clark in 2011, and contributed to RF/Analog IC design as a Graduate Research Assistant at Texas Tech University from 2012 to 2014. Ryan worked at Texas Instruments from 2014 to 2016 as a Design Verification Engineer and continued to hone their skills at Lockheed Martin as an Embedded Software Engineer from 2016 to 2018. Prior to their current role at Infineon, they were a Senior Member Technical Staff at Allegro MicroSystems in 2023. Ryan holds a Master's Degree in Electrical Engineering, having graduated from Texas Tech University with a GPA of 3.9.

Location

United States

Links

Previous companies


Org chart

This person is not in the org chart


Teams

This person is not in any teams


Offices

This person is not in any offices