Sachin Dev is a Staff Design Engineer at Infineon Technologies, where they develop PDK components, including Calibre ERC/LVS/LDLPERC and Quantus Extraction runsets. Prior to this role, Sachin worked as a Design Engineer at Cadence Design Systems from 2018 to 2023, focusing on in-house PERC decks and DRC checks, among other responsibilities. Sachin's earlier experience includes a position at Sankalp Semiconductor Pvt Ltd, where they contributed to SKILL/PERL automation and PERC deck enhancements. Sachin holds a Master of Technology in Microelectronics from BITS Pilani, earned between 2020 and 2022.
This person is not in the org chart
This person is not in any teams
This person is not in any offices