Suchit Jain

Suchit Jain is an engineer at Infineon Technologies with a background in physical design and verification. They have approximately one year of hands-on experience with Intel's 7nm and 10nm SOC physical verification processes and previously worked at Intel Corporation, where they efficiently managed DRC and LVS error cleanups and critical timing requirements. Suchit completed a Master of Technology in Microelectronics at Manipal Institute of Technology and is currently pursuing a Bachelor of Engineering in Electronics and Communication Engineering.