李树青

树青 李 is an IC architecture engineer at 浪潮, having previously served as an FPGA architect at 深圳市中辅科技有限公司 and a development manager at 北京中科世行测控技术有限公司. With over 10 years of design experience in Verilog and digital logic, they have led teams on multiple projects and possess expertise in hardware design and high-speed interfaces. 树青 holds a bachelor's degree in Electrical, Electronics and Communications Engineering from 哈尔滨工程大学 and a master's degree in Circuits and Systems from 西安电子科技大学. They are proficient in various simulation and verification tools and have been certified as a LabVIEW architect.