Anantharaj S. is a Senior Analog Layout Designer at Intel Corporation, where they have worked since 2022. With over 12 years of experience in analog layout design, Anantharaj has contributed to various projects including D-PHY, M-PHY, and PCIe using several advanced technologies such as 14nm and 28nm. Earlier roles included positions at Altran, Gigacom Semiconductor, Tessolve Semiconductor, and Arasan Chip Systems. Anantharaj holds an Engineer's Degree in Electrical, Electronics, and Communications Engineering from Anna University, completed in 2011.
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