Arun Y.P is a VLSI Engineer currently working at Audience, Inc. since 2012, where they focus on RTL functional verification at both module and top levels. Prior to this role, Arun held positions as a contractor at AMD and as an Associate Engineer at SmartPlay Technologies, specializing in core functional verification. They also served as a Sr. Analog Mixed Signal Verification Engineer at Intel Corporation. Arun completed an M.Tech in VLSI Design & Embedded Systems from PESIT, Bangalore, and holds a Bachelor of Engineering from BCE.
Location
Mandya, India
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