Daniel Chanemougame is a Senior Technologist at Intel, specializing in Pathfinding Design Technology Co-Optimization and Power Performance Area (PPAC) analysis. With over 20 years of experience in the semiconductor industry, Daniel has previously held positions at Tokyo Electron US, STMicroelectronics, and GLOBALFOUNDRIES, focusing on advanced device modeling, process integration, and logic simulations. Daniel earned a Ph.D. in Microelectronics and holds two MSc degrees from INSA Lyon, contributing to expertise in technology definition and development. Passionate about enhancing compute energy efficiency, Daniel integrates technology and design in innovative ways to advance industry roadmaps.
This person is not in the org chart
This person is not in any teams
This person is not in any offices