Debendra Das Sharma is an accomplished engineer with extensive experience at Intel Corporation, serving as Intel Senior Fellow since September 2001, where responsibilities include leading the architecture of critical interconnect technologies such as PCIe and CXL. With a strong background in I/O innovations, Debendra has made significant contributions to PCI-Express, serving as a board member and chair of the PHY Logical Group for PCI-SIG. Responsibilities include leading the development of advanced PCIe IP blocks and post-silicon validation efforts. Debendra also co-chairs the Compute Express Link Technical Task Force while previously holding a position at Hewlett-Packard as Engineering Scientist and Lead Engineer, where contributions included the coherent I/O link protocol definition for Superdome servers. Debendra holds a PhD in Computer Engineering from the University of Massachusetts Amherst and a BTech in Computer Science and Engineering from the Indian Institute of Technology, Kharagpur.
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