Greg Watson is a seasoned professional specializing in ASIC design with extensive experience in developing ASICs for networking equipment and deep packet inspection engines. They held various senior roles, including Senior Engineer at Barefoot Networks, where they worked on a 6Tb/s switch architecture, and Manager of R&D at PMC-Sierra, overseeing the design of core routers. Greg also contributed to academia as a Senior Research Engineer at Stanford University, developing the NetFPGA Ethernet board. They earned a PhD in Computer Networks from Ecole Nationale Superieure des Telecommunications and multiple degrees from The University of Manchester. Currently, Greg is a Principal Engineer at Intel Corporation.
Location
Palo Alto, United States
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