Guanlin Zhang

Lead Analog/Mixed-signal design in 28Gbs SerDes for Intel A10/S10 FPGA, PLL/CDR/CTLE/VGA

Guanlin 'Patrick' Zhang is an RF/Analog/Mixed-signal Designer with over 15 years of experience in the semiconductor industry. Currently serving as a Senior Staff Hardware Developer at Oracle and a Lead Analog/Mixed-signal Designer at Intel Corporation, they specialize in analog/mixed-signal SOC design, particularly in SerDes, PLL, and CDR technologies. Guanlin has a strong background in project management, cross-functional team collaboration, and advanced low power analog design, along with a focus on pushing technology limits in areas like IoT, smart sensors, and deep learning. They are pursuing a degree in Physics & Electrical Engineering at Nanjing University.

Location

Santa Clara, United States

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