Harshita Pal is a skilled validation engineer with extensive experience in the semiconductor and defense sectors. Currently serving as the Lead - System Functional Validation at Intel Corporation, Harshita focuses on pre and post-silicon validation for various integrated system components. Previously, Harshita held the position of Senior Validation Engineer at NXP Semiconductors, specializing in automotive silicon functional validation, digital validation of IPs, and understanding deep neural networks for vision IPs. Earlier experience includes an internship in cryptographic security at the Defence Research and Development Organisation (DRDO). Harshita holds an M.Tech in Information Security Management from Indira Gandhi Delhi Technical University for Women and a B.Tech in Computer Science from Hansraj College, along with impressive academic credentials from K.V. Sector 31-D, Chandigarh.
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