Hoy Y.

Hoy Y. is a Senior Design Engineer at Intel Corporation, where they have worked since 2001, specializing in clock distribution, clock tree synthesis, and timing simulation. Prior to this role, they were a Consulting Engineer at Cadence Design from 1997 to 2001. Hoy Y. earned a Bachelor of Science degree in Electrical Engineering from the University of Washington between 1994 and 1998.